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NUD3105 Integrated Relay, Inductive Load Driver
This device is used to switch inductive loads such as relays, solenoids incandescent lamps , and small DC motors without the need of a free-wheeling diode. The device integrates all necessary items such as the MOSFET switch, ESD protection, and Zener clamps. It accepts logic level inputs thus allowing it to be driven by a large variety of devices including logic gates, inverters, and microcontrollers.
Features http://onsemi.com
* Provides a Robust Driver Interface Between D.C. Relay Coil and * * * * *
Sensitive Logic Circuits Optimized to Switch Relays from 3.0 V to 5.0 V Rail Capable of Driving Relay Coils Rated up to 2.5 W at 5.0 V Internal Zener Eliminates the Need of Free-Wheeling Diode Internal Zener Clamp Routes Induced Current to Ground for Quieter Systems Operation Low VDS(ON) Reduces System Current Drain
Relay, Inductive Load Driver Silicon SMALLBLOCK] 0.5 Ampere, 8.0 V Clamp
MARKING DIAGRAM
3 SOT-23 TO-236 CASE 318 2 JW4D
1
Typical Applications
* Telecom: Line Cards, Modems, Answering Machines, FAX * Computers and Office: Photocopiers, Printers, Desktop Computers * Consumer: TVs and VCRs, Stereo Receivers, CD Players, Cassette * Industrial:Small Appliances, Security Systems, Automated Test *
Equipment, Garage Door Openers Automotive: 5.0 V Driven Relays, Motor Controls, Power Latches, Lamp Drivers
Gate (1)
JW4 D
= Specific Device Code = Date Code
Recorders
INTERNAL CIRCUIT DIAGRAM Drain (3)
1.0 k 300 k
Source (2)
ORDERING INFORMATION
Device NUD3105LT1 Package SOT-23 Shipping 3000 Units/Reels
(c) Semiconductor Components Industries, LLC, 2003
1
March, 2003 - Rev. 2
Publication Order Number: NUD3105/D
NUD3105
Maximum Ratings (TJ = 25C unless otherwise specified)
Symbol VDSS VGS ID Ez Ezpk Drain to Source Voltage - Continuous Gate to Source Voltage - Continuous Drain Current - Continuous Single Pulse Drain-to-Source Avalanche Energy (TJinitial = 25C) (Note 2) Repetitive Pulse Zener Energy Limit (DC v 0.01%) (f = 100 Hz, DC = 0.5) Junction Temperature Operating Ambient Temperature Storage Temperature Range Total Power Dissipation (Note 1) Derating Above 25C Thermal Resistance Junction-to-Ambient Rating Value 6.0 6.0 500 50 4.5 150 -40 to 85 -65 to +150 225 1.8 556 Unit Vdc Vdc mA mJ mJ C C C mW mW/C C/W
TJ
TA Tstg PD RqJA
1. This device contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL_STD-883, Method 3015. Machine Model Method 200 V. 2. Refer to the section covering Avalanche and Energy and Figure 12.
Typical Electrical Characteristics (TJ = 25C unless otherwise noted)
Symbol OFF CHARACTERISTICS VBRDSS BVGSO IDSS Drain to Source Sustaining Voltage (Internally Clamped) (ID = 10 mA) Ig = 1.0 mA Drain to Source Leakage Current (VDS = 5.5 V , VGS = 0 V, TJ = 25C) (VDS = 5.5 V, VGS = 0 V, TJ = 85C ) Gate Body Leakage Current (VGS = 3.0 V, VDS = 0 V) (VGS = 5.0 V, VDS = 0 V) 6.0 5.0 8.0 9.0 8.0 15 15 19 50 V V mA Characteristic Min Typ Max Unit
IGSS
mA
ON CHARACTERISTICS VGS(th) Gate Threshold Voltage (VGS = VDS, ID = 1.0 mA) (VGS = VDS, ID = 1.0 mA, TJ = 85C) Drain to Source On-Resistance (ID = 250 mA, VGS = 3.0 V) (ID = 500 mA, VGS = 3.0 V) (ID = 500 mA, VGS = 5.0 V) (ID = 500 mA, VGS = 3.0 V, TJ=85C) (ID = 500 mA, VGS = 5.0 V, TJ=85C) Output Continuous Current (VDS = 0.25 V, VGS = 3.0 V) (VDS = 0.25 V, VGS = 3.0 V, TJ = 85C) Forward Transconductance (VOUT = 5.0 V, IOUT = 0.25 A) 0.8 0.8 300 200 350 1.2 400 570 1.4 1.4 1.2 1.3 0.9 1.3 0.9 V
RDS(on)
W
IDS(on)
mA mmhos
gFS
DYNAMIC CHARACTERISTICS Ciss Coss Input Capacitance (VDS = 5.0 V,VGS = 0 V, f = 1.0 MHz) Output Capacitance (VDS = 5.0 V, VGS = 0 V, f = 1.0 MHz) 25 37 pF pF
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NUD3105
Typical Electrical Characteristics (TJ = 25C unless otherwise noted)
Symbol DYNAMIC CHARACTERISTICS Crss Transfer Capacitance (VDS = 5.0 V, VGS = 0 V, f = 1.0 MHz) 8.0 pF Characteristic Min Typ Max Unit
SWITCHING CHARACTERISTICS Symbol tPHL tPLH tPHL tPLH tf tr tf tr Characteristic Propagation Delay Times: High to Low Propagation Delay; Figure 1 (5.0 V) Low to High Propagation Delay; Figure 1 (5.0 V) High to Low Propagation Delay; Figure 1 (3.0 V) Low to High Propagation Delay; Figure 1 (3.0 V) Transition Times: Fall Time; Figure 1 (5.0 V) Rise Time; Figure 1 (5.0 V) Fall Time; Figure 1 (3.0 V) Rise Time; Figure 1 (3.0 V) Min Typ 25 80 44 44 23 32 53 30 Max nS Units nS
-
VCC Vin 50% GND tPLH 90% 50% 10% tr tf tPHL VZ VCC GND
Vout
Figure 1. Switching Waveforms
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NUD3105
TYPICAL CHARACTERISTICS
10 10
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
TJ = 25C
1.0
VGS = 5.0 V VGS = 3.0 V
VDS = 0.8 V
1.0 0.1 0.01 0.001 0.0001
0.1 0.01 0.001
VGS = 2.0 V
85C 50C 25C
0.0001
0.00001
VGS = 1.0 V
0.00001 0.000001
-40 C 0.7 0.8 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
0
0.1
0.2
0.3
0.4
0.5
0.6
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS, GATE-T O-SOURCE VOLTAGE (V)
Figure 2. Output Characteristics
1200 RDS(ON), DRAIN-TO-SOURCE RESISTANCE (mW) 1000 800 600 400 200 0 -50 ID = 0.5 A VGS = 5.0 V ID = 0.25 A VGS = 3.0 V RDS(ON), DRAIN-TO-SOURCE RESISTANCE (W) ID = 0.5 A VGS = 3.0 V 50 45 40 35 30 25
Figure 3. Transfer Function
ID = 250 mA
-40 C
125C 85C
50C 20 15 0.8 25C 1.0 1.2 1.4 1.6 1.8 2.0
-25
0
25
50
75
100
125
TEMPERATURE (C)
VGS, GATE-T O-SOURCE VOLTAGE (V)
Figure 4. On Resistance Variation vs. Temperature
Figure 5. RDS(ON) Variation with Gate-T o-Source Voltage
13.0
8.20 VZ, ZENER CLAMP VOLTAGE (V) 8.18 VZ, ZENER VOLTAGE (V) 8.16 8.14 8.12 8.10 8.08 8.06 8.04 8.02 8.00 -50 -25 0 25 50 75 100 IZ = 10 mA
12.0 11.0 10.0 9.0 8.0 7.0
VGS = 0 V
-40 C 25C
85C 6.0 0.1 1.0 10 100 1000
125
TEMPERATURE (C)
IZ, ZENER CURRENT (mA)
Figure 6. Zener Voltage vs. Temperature
Figure 7. Zener Clamp Voltage vs. Zener Current
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NUD3105
TYPICAL CHARACTERISTICS
1.2 1.1 RDS(ON), DRAIN-TO-SOURCE RESISTANCE (W) IGSS, GATE LEAKAGE (mA) 125C 1.0 0.9 0.8 0.7 0.6 0.5 0.05 85C 50C 25C -40 C 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 40 35 30 25 20 15 VGS = 3.0 V 10 5 0 -50 -25 0 25 50 75 100 125 VGS = 5.0 V
ID, DRAIN CURRENT (A)
TEMPERATURE (C)
Figure 8. On-Resistance vs. Drain Current and Temperature
1.0 VGS = 3.0 V, TC = 25C
Figure 9. Gate Leakage vs. Temperature
ID- Continuous = 0.5 A RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT
ID, DRAIN CURRENT (A)
DC PW = 0.1 s DC = 50% PW = 10 ms DC = 20% PW = 7.0 ms DC = 5% Typical IZ vs. VZ 1.0 10 100
0.1
V(BR)DSS min = 6.0 V 0.01 0.01 0.1
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10. Safe Operating Area
1.0 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
D = 0.5 0.2 0.1
0.1
0.05 Pd(pk) 0.02 0.01
0.01
SINGLE PULSE
PW
t1 t2 PERIOD
DUTY CYCLE = t1/t2
0.001 0.01
0.1
1.0
10
100 t1, PULSE WIDTH (ms)
1000
10,000
100,000
1,000,000
Figure 11. Transient Thermal Response http://onsemi.com
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NUD3105
Avalanche Energy
The drain-to-source clamp, internal to the NUD3105, is designed to protect the device during avalanche energy produced by a load such as an inductor or relay. In many cases, the upper limit of this clamp will be a function of the current through it and the drain-to-source breakdown voltage. The maximum material voltage of the NUD3105 is between 12 and 13 volts. Thus, as the breakdown exceeds 13 V, the device will fail due to the material voltage. This 12 V and 13 V on the clamp corresponds to a current through the clamp of 320 to 440 mA, respectively. The avalanche energy graph, given in Figure 12, is actually limited by the material voltage and the clamp current. Repetitive Avalanche Energy is based upon TJmax, TA, RqJA, Transient Thermal Response, Frequency and duty cycle.
EAS, SINGLE PULSE DRAIN-TO SOURCE AVALANCHE ENERGY (mJ) 60 50 40 30 VCC = 3.0 V 20 10 0 50
+ VCC 0
Inductor 31 2 0 1. Gate 2. Source 3. Drain
VCC = 5.0 V
100
150
200
250
300
350
condition begins to look more like a continuous duty operating condition over the time duration of the pulse. In these cases, the peak power dissipation rating cannot be merely time averaged by dividing the continuous power rating by the duty cycle of the pulse train. Instead, the average power rating can only be scaled up a reduced amount in accordance with the device's transient thermal response, so that the device's max junction temperature is not exceeded. Figure 11 of the NUD3105LT1 data sheet plots its transient thermal resistance, r(t) as a function of pulse width in ms for various pulse train duty cycles as well as for a single pulse and illustrates this effect. For short pulse widths near the left side of the chart, r(t), the factor, by which the continuous duty thermal resistance is multiplied to determine how much the peak power rating can be increased above the average power rating, approaches the duty cycle of the pulse train, which is the expected value. However, as the pulse width is increased, that factor eventually approaches 1.0 for all duty cycles indicating that the pulse width is sufficiently long to appear as a continuous duty condition to this device. For the NUD3105LT1, this pulse width is about 100 seconds. At this and larger pulse widths, the peak power dissipation capability is the same as the continuous duty power capability. To use Figure 11 to determine the peak power rating for a specific application, enter the chart with the worst case pulse condition, that is the max pulse width and max duty cycle and determine the worst case r(t) for your application. Then calculate the peak power dissipation allowed by using the equation,
Pd(pk) = (TJmax - TAmax) / (RqJA * r(t)) Pd(pk) = (150C - TAmax) / (556C/W * r(t))
INDUCTOR (mH)
Figure 12. Avalanche Energy
Using TTR Designing for Pulsed Operation
For a repetitive pulse operating condition, time averaging allows one to increase a device's peak power dissipation rating above the average rating by dividing by the duty cycle of the repetitive pulse train. Thus, a continuous rating of 200 mW of dissipation is increased to 1.0 W peak for a 20% duty cycle pulse train. However, this only holds true for pulse widths which are short compared to the thermal time constant of the semiconductor device to which they are applied. For pulse widths which are significant compared to the thermal time constant of the device, the peak operating
Thus for a 20% duty cycle and a PW = 40 ms, Figure 10 yields r(t) = 0.3 and when entered in the above equation, the max allowable Pd(pk) = 390 mW for a max TA = 85C. Also note that these calculations assume a rectangular pulse shape for which the rise and fall times are insignificant compared to the pulse width. If this is not the case in a specific application, then the VO and IO waveforms should be multiplied together and the resulting power waveform integrated to find the total dissipation across the device. This then would be the number that has to be less than or equal to the Pd(pk) calculated above. A circuit simulator having a waveform calculator may prove very useful for this purpose.
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NUD3105 INFORMATION FOR USING THE SOT-23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.037 0.95
The 556C/W for the SOT-23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT-23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal CladTM. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference should be a maximum of 10C. * The soldering temperature and time should not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient should be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
0.037 0.95
0.079 2.0 0.035 0.9 0.031 0.8 SOT-23
inches mm
SOT-23 POWER DISSIPATION The power dissipation of the SOT-23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RqJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT-23 package, PD can be calculated as follows:
PD = TJ(max) - TA RqJA
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 225 milliwatts.
PD = 150C - 25C 556C/W = 225 milliwatts
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NUD3105
Designing with this Data Sheet
1. Determine the maximum inductive load current (at max VCC, min coil resistance & usually minimum temperature) that the NUD3105 will have to drive and make sure it is less than the max rated current. 2. For pulsed operation, use the Transient Thermal Response of Figure 11 and the instructions with it to determine the maximum limit on transistor power dissipation for the desired duty cycle and temperature range. 3. Use Figures 10, 11 and 12 with the SOA notes to insure that instantaneous operation does not push the device beyond the limits of the SOA plot.
4. Verify that the circuit driving the gate will meet the VGS(th) from the Electrical Characteristics table. 5. Using the max output current calculated in step 1, check Figure 7 to insure that the range of Zener clamp voltage over temperature will satisfy all system & EMI requirements. 6. Use IGSS and IDSS from the Electrical Characteristics table to insure that "OFF" state leakage over temperature and voltage extremes does not violate any system requirements. 7. Review circuit operation and insure none of the device max ratings are being exceeded.
APPLICATIONS DIAGRAMS
+3.0 VDD +3.75 Vdc +4.5 VCC +5.5 Vdc
+
+
Vout (3) NUD3105LT1
Vout (3) NUD3105LT1
Vin (1)
Vin (1)
GND (2)
GND (2)
Figure 13. A 200 mW, 5.0 V Dual Coil Latching Relay Application with 3.0 V Level Translating Interface
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NUD3105
Max Continuous Current Calculation for TX2-5V Relay, R1 = 178 W Nominal @ RA = 25C Assuming 10% Make Tolerance, R1 = 178 W * 0.9 = 160 W Min @ TA = 25C TC for Annealed Copper Wire is 0.4%/C R1 = 160 W * [1+(0.004) * (-40-25 )] = 118 W Min @ -40C IO Max = (5.5 V Max - 0.25V) /118 W = 45 mA +4.5 TO +5.5 Vdc + AROMAT TX2-5V Vout (3) NUD3105LT1 AROMAT JS1E-5V + +4.5 TO +5.5 Vdc + AROMAT JS1E-5V + AROMAT JS1E-5V AROMAT JS1E-5V + -
Vout (3) NUD3105LT1
Vin (1) GND (2)
Vin (1) GND (2)
Figure 14. A 140 mW, 5.0 V Relay with TTL Interface
Figure 15. A Quad 5.0 V, 360 mW Coil Relay Bank
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NUD3105
PACKAGE DIMENSIONS SOT-23 (TO-236) CASE 318-08 ISSUE AH
A L
3 1 2
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318-03 AND -07 OBSOLETE, NEW STANDARD 318-08. DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60
BS
V
G C D H K J
STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN
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NUD3105
Notes
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NUD3105
SMALLBLOCK is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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NUD3105/D

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